Speaker
Description
The successful deployment of Monolithic Active Pixel Sensors (MAPS) in the Inner Tracking System 2 (ITS2) in the ALICE experiment at CERN, motivated the use of monolithic sensors in a 65 nm CMOS imaging process for the ALICE ITS3 upgrade and the ALICE 3 upgrade. The ITS3 upgrade aims to replace the three inner tracker layers during LHC Long Shutdown 3 (LS3) with ultra-thin, curved, wafer-scale Monolithic Active Pixel Sensors (MAPS). The ALICE 3 upgrade is a much larger scale upgrade in which the tracker will be fully replaced covering about 47 m2.
In synergy with the EP R&D on monolithic sensors, the selected 65 nm CMOS imaging process was modified to improve sensor performance. To validate this sensor performance, the Analog Pixel Test Structure (APTS), a 1.5 mm x 1.5 mm test chip featuring a 6x6 matrix (with direct analogue readout of the central 4x4) has been designed in several variants and measured in the lab and test beam.
In the last engineering run, ER2, to address the needs of the ITS3 and ALICE3 upgrades, a redesign of the chip in a more modular approach allowed the implementation of the APTS in a large number of variants. The P-well opening was varied to gain space and pixel pitch was systematically varied between 10 and 50 um. Four sensor process splits were also included.
These different variants of this chip are now extensively being tested to characterise sensor performance, and some of the measurements will be presented to illustrate this.
